The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 18, 2025
Filed:
Jun. 16, 2022
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Shahaji B. More, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
Some implementations described herein include a semiconductor device including a gate-all-around transistor. The gate-all-around transistor includes a source/drain region having a core epitaxial layer and a capping epitaxial layer. The core epitaxial layer is formed within the source/drain region using a deposition recipe having a temperature that is lesser relative to temperatures of other deposition recipes used to form other epitaxial layers, including the capping layer, within the source/drain region. The deposition recipe further includes a pressure that is greater relative to pressures of the other deposition recipes used to form the other epitaxial layers within the source/drain region. The temperature and pressure of the deposition recipe used to form the core epitaxial layer promote a uniform growth of the core epitaxial layer within the source/drain region. In this way, a likelihood of voids and/or defects is reduced to increase a yield of a semiconductor device including the core epitaxial layer.