The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2025

Filed:

Nov. 18, 2022
Applicant:

Nexperia B.v., Nijmegen, NL;

Inventors:

Yujun Zhao, Nijmegen, NL;

Jinxin Yi, Nijmegen, NL;

Yuan Li, Nijmegen, NL;

Frank Burmeister, Nijmegen, NL;

Jennifer Schuett, Nijmegen, NL;

Dicky Tirta Djaja, Nijmegen, NL;

Qingyuan Tang, Nijmegen, NL;

Assignee:

Nexperia B.V., Nijmegen, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/78 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 24/97 (2013.01); H01L 21/78 (2013.01); H01L 23/49822 (2013.01); H01L 24/16 (2013.01); H01L 24/48 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/97 (2013.01);
Abstract

A substrate-based package semiconductor device is provided. The present disclosure further relates to a carrier including a plurality of non-singulated substrate-based package semiconductor devices and to a method of manufacturing the same. In embodiments in accordance with the present disclosure, the lowest insulating layer(s) has/have cavities arranged near and associated with one or more package terminals, and an inner wall of the cavities is covered with a conductive body that connects to the respective associated package terminal. Furthermore, the non-singulated substrate-based package semiconductor devices are separated by a separating region of the substrate, and the cavities are at least partially formed in the separating region.


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