The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2025

Filed:

Jan. 30, 2023
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventor:

Zhiyuan Lu, Hefei, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/311 (2006.01); H01L 23/544 (2006.01);
U.S. Cl.
CPC ...
H01L 23/544 (2013.01); H01L 21/31144 (2013.01); H01L 2223/54426 (2013.01);
Abstract

A manufacturing method of a semiconductor structure includes: providing substrate including array area and peripheral area, where peripheral area includes mark area and blank area adjoining mark area; forming, on substrate, target layer and first core layer disposed on target layer, first core layer including first array core layer disposed on array area, first mark core layer disposed on mark area and first cap layer disposed on blank area, where first cap layer has inclined sidewall, and its top dimension is smaller than its bottom dimension; forming first dielectric layer covering sidewall of first core layer; forming first filling layer covering surface of first dielectric layer and filling gap in first core layer; and etching first dielectric layer and target layer along sidewalls of first array core layer and first mark core layer to transfer pattern of first core layer and pattern of first filling layer to target layer.


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