The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2025

Filed:

Jul. 20, 2024
Applicant:

Monolithic 3d Inc., Klamath Falls, OR (US);

Inventors:

Zvi Or-Bach, Haifa, IL;

Deepak C. Sekar, Sunnyvale, CA (US);

Brian Cronquist, Klamath Falls, OR (US);

Assignee:

Monolithic 3D Inc., Allen, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 21/74 (2006.01); H01L 23/34 (2006.01); H01L 23/50 (2006.01); H01L 23/544 (2006.01); H10B 12/00 (2023.01); H10B 41/20 (2023.01); H10B 41/40 (2023.01); H10B 43/20 (2023.01); H10B 43/40 (2023.01); H10D 10/01 (2025.01); H10D 10/40 (2025.01); H10D 30/01 (2025.01); H10D 30/69 (2025.01); H10D 30/83 (2025.01); H10D 62/17 (2025.01); H10D 84/83 (2025.01); H10D 84/90 (2025.01); H10D 88/00 (2025.01); H10D 89/10 (2025.01); H10B 63/00 (2023.01); H10D 84/40 (2025.01);
U.S. Cl.
CPC ...
H01L 23/481 (2013.01); H01L 21/743 (2013.01); H01L 23/34 (2013.01); H01L 23/50 (2013.01); H01L 23/544 (2013.01); H10B 12/09 (2023.02); H10B 12/20 (2023.02); H10B 12/50 (2023.02); H10B 41/20 (2023.02); H10B 41/40 (2023.02); H10B 43/20 (2023.02); H10B 43/40 (2023.02); H10D 10/051 (2025.01); H10D 10/40 (2025.01); H10D 30/0289 (2025.01); H10D 30/0411 (2025.01); H10D 30/0512 (2025.01); H10D 30/711 (2025.01); H10D 30/83 (2025.01); H10D 62/343 (2025.01); H10D 84/83 (2025.01); H10D 84/834 (2025.01); H10D 84/907 (2025.01); H10D 88/00 (2025.01); H10D 89/10 (2025.01); H01L 2224/16225 (2013.01); H01L 2224/73253 (2013.01); H01L 2924/12032 (2013.01); H01L 2924/1305 (2013.01); H01L 2924/13062 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/1461 (2013.01); H01L 2924/16152 (2013.01); H10B 63/30 (2023.02); H10B 63/845 (2023.02); H10D 84/401 (2025.01);
Abstract

A 3D semiconductor device, the device including: a first level including single crystal first transistors, a first metal layer, and a first isolation layer; a second level including second transistors and a second isolation layer, where the first level is overlaid by the second level; a third level including single crystal third transistors, where the second level is overlaid by the third level, where the third level includes a third isolation layer, where the third level is bonded to the second level; and a power delivery path to the second transistors, where at least a portion of the power delivery path is connected to at least one of the first transistors.


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