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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12476161 B1

PDFFull Text
Date of Patent:
Nov. 18, 2025

Filed:

Feb. 23, 2022

Semiconductor package with lead frame

Applicant:

Rohm Co., Ltd., Kyoto, JP;

Inventors:

Ryuta Kimura, Kyoto, JP;

Yosui Futamura, Kyoto, JP;

Assignee:

ROHM CO., LTD., Kyoto, JP;

Attorney:

HSML P. C.

Primary Examiner:

Davienne N Monbleau

Assistant Examiner:

Dmitri undefined Mihaliov

Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 23/495 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3142 (2013.01); H01L 23/49513 (2013.01); H01L 23/49568 (2013.01); H01L 24/48 (2013.01); H01L 23/49575 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/18301 (2013.01);
Abstract

There is provided a semiconductor device including: a first lead; a first semiconductor element mounted on the first lead; and a sealing resin that covers the first semiconductor element, wherein the first lead includes a first die pad, a second die pad, a third die pad, a first connecting portion, and a second connecting portion, wherein the first die pad has a first main surface and a first back surface facing opposite sides in a thickness direction, and wherein the second die pad is arranged side by side with the first die pad in a first direction orthogonal to the thickness direction, and is located on a side of the first main surface with respect to the first die pad in the thickness direction.

Find Patent Forward Citations

Kimura, Ryuta. (2025). Semiconductor package with lead frame (U.S. Patent No. 12476161). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12476161

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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