The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 18, 2025
Filed:
Jan. 10, 2023
Sambanova Systems, Inc., Palo Alto, CA (US);
Matthew Vilim, Palo Alto, CA (US);
Raghu Prabhakar, Palo Alto, CA (US);
Matt Feldman, Palo Alto, CA (US);
Yaqi Zhang, Palo Alto, CA (US);
SambaNova Systems, Inc., Palo Alto, CA (US);
Abstract
A statically reconfigurable dataflow architecture processor (SRDAP) performs an N-dimensional affine transform specified by a matrix on an input image to produce an output image includes pattern compute units (PCUs) and pattern memory units (PMUs) interconnected by switches. PCUs have vector pipelines of functional units that perform operations on operands received from previous pipeline stages, another PCU, and/or PMUs. PMUs have memories loadable with the input image. The PCUs and PMUs are statically reconfigurable to, for all the output pixels: apply the matrix to vectors of output pixel coordinates to calculate corresponding vectors of input pixel coordinates, flatten the vectors of input pixel coordinates into vectors of PMU addresses of the input pixels, read values of the input pixels from the PMUs at the calculated input pixel addresses, and write vectors of the input pixel values to PMUs to form the output image.