The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2025

Filed:

Feb. 20, 2024
Applicant:

Synopsys, Inc., Sunnyvale, CA (US);

Inventors:

Sudeep Mondal, Uttar Pradesh, IN;

Barsneya Chakrabarti, Uttar Pradesh, IN;

Ankit Arora, Uttar Pradesh, IN;

Paras Mal Jain, San Jose, CA (US);

Assignee:

SYNOPSYS, INC., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/00 (2013.01); G06F 21/57 (2013.01); G06F 21/71 (2013.01); G06F 30/398 (2020.01);
U.S. Cl.
CPC ...
G06F 21/577 (2013.01); G06F 21/71 (2013.01); G06F 30/398 (2020.01); G06F 2221/034 (2013.01);
Abstract

A method includes: receiving an integrated circuit design; classifying, by the processing device, a signal path of a sub-circuit of the integrated circuit design based on a connection between an input port of the signal path and a component of the sub-circuit to generate a classification of the signal path; computing, by the processing device, a security vulnerability result of the sub-circuit of the integrated circuit design based on the classification of the signal path and based on a trust level of a zone in a fan-in cone to an input port of the signal path; and generating a security vulnerability report based on the security vulnerability result of the sub-circuit of the integrated circuit design.


Find Patent Forward Citations

Loading…