The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 18, 2025
Filed:
Dec. 23, 2021
Intel Corporation, Santa Clara, CA (US);
James Keith Hodgson, Hillsboro, OR (US);
Fabrice Paillet, Portland, OR (US);
Christopher J. Mandic, Hillsboro, OR (US);
Cary Renzema, North Plains, OR (US);
Anand Ramasundar, Portland, OR (US);
Sami Hyvonen, Beaverton, OR (US);
Po-Cheng Chen, Tigard, OR (US);
Alex Santiago Rodriguez, Hillsboro, OR (US);
Sergio Carlo Rodriguez, Hillsboro, OR (US);
Saravanan Ramamoorthy, Beaverton, OR (US);
Ruthvin Jeevan Suvarna, Hillsboro, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A reduced-size replica of power gate transistors may be used within a closed-loop voltage regulator to measure the average current delivered by the transistors in the non-replica power gate. The measured current is compared against a known reference current, and a feedback loop is used to modify the gate bias of the power gate and replica power gate transistors. An improved current sensing power gate replica solution may include measuring current from a small replica of the power gate and extrapolating the total current by digitally multiplying the replica current by the ratio of the size of the enabled power gates to the size of the replicas. The current through the replicas, which substantially matches the current in equivalent power gate devices, may be collected on an analog bus and conducted across a known resistor to generate a voltage that determines an estimated current of the power gate devices.