The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 11, 2025
Filed:
May. 22, 2024
Applicant:
Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;
Inventors:
Yuan-Sheng Huang, Taichung, TW;
Ryan Chia-Jen Chen, Hsinchu, TW;
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu, TW;
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); H01L 29/94 (2006.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01);
U.S. Cl.
CPC ...
H10D 84/038 (2025.01); H10D 62/115 (2025.01); H10D 64/017 (2025.01); H10D 84/0158 (2025.01); H10D 84/834 (2025.01);
Abstract
A method includes: receiving a substrate; depositing a first gate layer over the substrate; patterning the first gate layer to form a first gate stack and leaving at least one void exposed from a sidewall of the first gate stack; depositing a dielectric layer on the sidewall of the first gate stack; and removing a first portion of the dielectric layer from the sidewall of the first gate stack while leaving a second portion of the dielectric layer to fill the at least one void.