The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 11, 2025

Filed:

Jan. 08, 2023
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventors:

Dongbo Zhu, Hefei, CN;

Ming-Hui Huang, Hefei, CN;

Tzung-Han Lee, Hefei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 20/25 (2023.01); G11C 17/16 (2006.01); G11C 17/18 (2006.01); H01L 23/525 (2006.01);
U.S. Cl.
CPC ...
H10B 20/25 (2023.02); G11C 17/16 (2013.01); G11C 17/18 (2013.01); H01L 23/5252 (2013.01);
Abstract

Embodiments relate to an anti-fuse array and a memory. The anti-fuse array includes: a column of first active areas, where each of the first active areas includes a first channel region, a first source/drain region and a second source/drain region, and a first programming region; a column of second active areas, where each of the second active areas includes a second channel region, a third source/drain region and a fourth source/drain region, and a second programming region, an end portion, close to the first active areas, of the given second active area directly faces a region between end portions, close to the given second active area, of two adjacent first active areas; a first gate line; a second gate line covering each second channel region in a column of the second active areas; and a programming gate line.


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Quick Actions:

Zhu, Dongbo. (2025). Anti-fuse array and memory (U.S. Patent No. 12471275). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12471275

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