The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 11, 2025

Filed:

Mar. 28, 2024
Applicant:

Winbond Electronics Corp., Taichung, TW;

Inventors:

John H. Bui, San Jose, CA (US);

Poongyeub Lee, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0185 (2006.01);
U.S. Cl.
CPC ...
H03K 19/018521 (2013.01);
Abstract

A level-shift buffer device includes an input buffer circuit, a configurable circuit and a level-shift circuit. The input buffer circuit receives input/output (I/O) supply voltage at a first voltage level among a plurality of voltage levels that are supported by the level-shift buffer device. The input buffer circuit generates a first input signal according to the first voltage level of the I/O supply voltage. The configuration circuit controls at least one transistor of the configurable circuit according to the configuration signal to generate a second input signal. The level-shift circuit generates an output signal at a second voltage level according to the second input signal and the configuration signal, wherein the level-shift circuit functions as an inverter or a level shifter in accordance with the configuration signal.


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