The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 11, 2025

Filed:

Sep. 27, 2023
Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventors:

Wei-Yi Cheng, Tainan, TW;

Su-Chueh Lo, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/22 (2006.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
G11C 7/222 (2013.01); G11C 7/1039 (2013.01); G11C 7/1063 (2013.01); G11C 2207/2254 (2013.01);
Abstract

A calibration apparatus of a memory device and a calibration method thereof are provided. The memory device is a 3D NAND flash with high capacity and high performance. The calibration apparatus includes an impedance, a strong-arm comparator, a logic circuit, and a calibration controller. The impedance is configured to generate a comparison voltage. The strong-arm comparator includes a differential input pair and a latch. The differential input pair compares a reference voltage and the comparison voltage to produce a comparison result. The latch latches the comparison result and generates a latch signal and an inverted latch signal accordingly. The logic circuit generates a comparison result signal according to the latch signal and the inverted latch signal. The calibration controller implements an impedance calibration in the memory device according to the comparison result signal.


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