The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 11, 2025
Filed:
Jul. 21, 2022
Synopsys, Inc., Mountain View, CA (US);
Alexander Rabinovitch, Shrewsbury, MA (US);
Manish Shroff, Milford, MA (US);
Baijayanta Ray, Bangalore, IN;
Synopsys, Inc., Sunnyvale, CA (US);
Abstract
Circuit designs are emulated to verify the functionality of the circuit design. Emulating the circuit design includes obtaining a circuit design. The circuit design includes clock signals. Each of the clock signals is a data path clock signal. Further, a first clock signal of the clock signals is determined to be faster than a second clock signal of the clock signals. Rising edges and falling edges of the second clock signal are aligned with rising edges of the first clock signal to generate a realigned clock signal based on determining that the first clock signal is faster than the second clock signal. The circuit design is emulated using the realigned clock signal.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile