The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 04, 2025
Filed:
Jan. 08, 2024
Applicant:
Samsung Electronics Co., Ltd., Gyeonggi-do, KR;
Inventors:
Jeonghyuk Yim, Halfmoon, NY (US);
Kang Ill Seo, Springfield, VA (US);
Assignee:
SAMSUNG ELECTRONICS CO., LTD., Suwon-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/20 (2006.01); H01L 21/3065 (2006.01); H01L 21/308 (2006.01); H10D 30/01 (2025.01); H10D 30/63 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01);
U.S. Cl.
CPC ...
H10D 84/016 (2025.01); H01L 21/3065 (2013.01); H01L 21/308 (2013.01); H10D 30/025 (2025.01); H10D 30/63 (2025.01); H10D 84/0128 (2025.01); H10D 84/0135 (2025.01); H10D 84/0151 (2025.01); H10D 84/038 (2025.01); H10D 84/83 (2025.01);
Abstract
Provided is a vertical field-effect transistor (VFET) device which includes: a substrate; a plurality of single-fin VFETs including respective 1fin structures on the substrate; and a plurality of multi-fin VFETs each of which includes a plurality of 2fin structures on the substrate, wherein a fin pitch of the 2fin structures is smaller than a fin pitch of the 1fin structures.