The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 04, 2025

Filed:

Jun. 22, 2023
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Huimei Zhou, Albany, NY (US);

Carl Radens, LaGrangeville, NY (US);

Chen Zhang, Santa Clara, CA (US);

Junli Wang, Slingerlands, NY (US);

Miaomiao Wang, Albany, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 10/00 (2023.01); H10D 30/01 (2025.01); H10D 30/43 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H10B 10/12 (2023.02); H10D 30/014 (2025.01); H10D 30/43 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10D 64/017 (2025.01); H10D 84/85 (2025.01);
Abstract

A semiconductor device is provided. The semiconductor device includes a semiconductor device comprising: a first stacked field effect transistor (FET) structure in a first device area, the first stacked FET structure comprising a first pull down (PD) transistor, and a first pull up (PU) transistor disposed over the first PD transistor, a first metal gate that is shared by the first PD transistor and the first PU transistor; and an oxygen blocking layer provided on the first metal gate.


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