The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 04, 2025

Filed:

Jul. 02, 2024
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Vivek Venkata Kalluru, San Jose, CA (US);

Michele Piccardi, Cupertino, CA (US);

Taehyun Kim, San Jose, CA (US);

Theodore T. Pekny, San Jose, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/26 (2006.01); G11C 16/04 (2006.01); G11C 16/28 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G11C 16/26 (2013.01); G11C 16/0483 (2013.01); G11C 16/28 (2013.01); G11C 16/3418 (2013.01); G11C 16/3422 (2013.01); G11C 16/3431 (2013.01); G11C 16/3459 (2013.01);
Abstract

Control logic in a memory device initiates a read operation on a memory array of the memory device and performs a calibration operation to detect a change in string resistance in the memory array. The control logic determines whether the change in string resistance is attributable to charge loss in the memory array, and responsive to determining that the change in string resistance is attributable to charge loss in the memory array, preforms the read operation using calibrated read voltage levels to read data from the memory array.


Find Patent Forward Citations

Loading…