The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 28, 2025

Filed:

Mar. 16, 2023
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Gang Xiong, Portland, OR (US);

Debdeep Chatterjee, San Jose, CA (US);

Yingyang Li, Beijing, CN;

Yi Wang, Beijing, CN;

Sergey Panteleev, Kildare, IE;

Salvatore Talarico, Sunnyvale, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04W 72/04 (2023.01); H04L 5/14 (2006.01); H04W 72/0453 (2023.01); H04W 72/23 (2023.01); H04W 74/0833 (2024.01); H04W 74/0836 (2024.01);
U.S. Cl.
CPC ...
H04W 72/0453 (2013.01); H04L 5/14 (2013.01); H04W 72/23 (2023.01); H04W 74/0833 (2013.01); H04W 74/0836 (2024.01);
Abstract

Various embodiments herein provide techniques for downlink and uplink resource mapping for full duplex communication, e.g., non-overlapping sub-band-full duplex (NOSB-FD) communication that includes a frequency resource for uplink communication and a frequency resource for downlink communication. Also described are techniques for user equipment (UE) behavior associated with a non-cell defining synchronization signal block (NCD-SSB). Other embodiments may be described and claimed.


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