The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 28, 2025
Filed:
May. 04, 2023
Qualcomm Incorporated, San Diego, CA (US);
Satish Krishnamoorthy, San Diego, CA (US);
Young Uk Yim, San Diego, CA (US);
Ashwin Sethuram, San Clemente, CA (US);
QUALCOMM INCORPORATED, San Diego, CA (US);
Abstract
An ESD protection circuit in an interface circuit has a first diode coupled between a first power source of an integrated circuit device and an input/output pad of the integrated circuit device, a second diode coupled between a second power source of the integrated circuit device and the input/output pad, and a resistive element that couples the second diode to the first diode and to the input/output pad. The first power source supplies a driver circuit coupled to the input/output pad. The second power source supplies one or more core circuits of the integrated circuit device. The resistive element may be implemented as an interconnect configured to provide a resistance that produces a voltage differential between a terminal of the second diode and a corresponding terminal of the first diode during an electrostatic discharge event.