The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 21, 2025
Filed:
Aug. 23, 2022
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Johnny Chiahao Li, Hsinchu, TW;
Jung-Chan Yang, Hsinchu, TW;
Jian-Sing Li, Hsinchu, TW;
Hui-Zhong Zhuang, Hsinchu, TW;
Jerry Chang Jui Kao, Hsinchu, TW;
Xiangdong Chen, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
A method of forming an integrated circuit (IC) includes generating a netlist of a first circuit, generating a first cell layout of the first circuit, placing the first cell layout, by an automatic placement and routing (APR) tool, in a first region of a layout design. The first circuit is configured as a non-functional circuit. The first circuit includes a first pin and a second pin that are electrically disconnected from each other. Generating the netlist of the first circuit includes designating the first pin and the second pin as a first group of pins that are to be connected together. Placing the first cell layout by the APR tool includes connecting the first pin and the second pin in the first group of pins together thereby changing the first circuit to a second circuit. The second circuit is configured as a functional version of the first circuit.