The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 21, 2025

Filed:

Oct. 10, 2023
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Sumangal Chakrabarty, Campbell, CA (US);

Prateek Sharma, San Jose, CA (US);

Raja V. S. Halaharivi, Gilroy, CA (US);

Yoav Weinberg, Toronto, CA;

Di Hsien Ngu, Zhubei, TW;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/1081 (2016.01); G06F 13/30 (2006.01);
U.S. Cl.
CPC ...
G06F 12/1081 (2013.01); G06F 13/30 (2013.01); G06F 2212/6022 (2013.01); G06F 2212/657 (2013.01);
Abstract

A system includes host interface circuitry to interact with a host system and that includes an address translation circuit, which includes request staging queues to buffer the address translation requests, each includes a virtual address and received from a host interface circuit. Pending response queues buffer respective address translation requests that are waiting for an address translation from the host system while maintaining an order as received within the request stage queues. Reordering buffers reorder address translations, which are to be supplied to the host interface circuits, according to the order maintained within the pending response queues, each address translation includes a physical address mapped to the virtual address of a corresponding address translation request. A cache stores multiple of the address translations, associated with the address translation requests, for future access by the host interface circuits.


Find Patent Forward Citations

Loading…