The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 21, 2025
Filed:
Oct. 27, 2021
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Shen Zhou, Shanghai, CN;
Xiaoming Du, Shanghai, CN;
Cong Li, Shanghai, CN;
Kuljit S. Bains, Olympia, WA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/00 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0619 (2013.01); G06F 3/0629 (2013.01); G06F 3/0679 (2013.01);
Abstract
A system can predict what pages of memory the system should offline based on identification of how correctable error patterns correlate to the memory architecture. The failure prediction can account for the circuit-level architecture of the memory rather than the mere number or frequency of correctable errors. A controller correlates the hardware configuration of the memory with historical error data, and generates an estimate of pages for a host operating system (OS) to offline based on predicting uncorrectable errors (UEs).