The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2025

Filed:

Mar. 26, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Yu-Hsing Chang, Taipei, TW;

Chern-Yow Hsu, Hsin-Chu County, TW;

Shih-Chang Liu, Kaohsiung, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10D 1/66 (2025.01); H01L 21/027 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H10D 1/00 (2025.01); H10D 1/68 (2025.01);
U.S. Cl.
CPC ...
H10D 1/66 (2025.01); H01L 21/0271 (2013.01); H01L 21/76877 (2013.01); H01L 23/5223 (2013.01); H10D 1/042 (2025.01); H10D 1/68 (2025.01); H10D 1/714 (2025.01);
Abstract

A semiconductor device includes: a first conductive plate and a second conductive plate disposed adjacent to the first conductive plate; a first insulating plate disposed over the first conductive plate and the second conductive plate; a third conductive plate disposed over the first insulating plate; a second insulating plate disposed over the third conductive plate; a fourth conductive plate disposed on one side of the second conductive plate opposite to the first conductive plate; a first conductive spacer disposed on the first insulating plate adjacent to the fourth conductive plate; a first conductive via penetrating the second insulating plate, the first insulating plate, and the first conductive plate, wherein the first conductive via is electrically coupled to the first conductive plate; and a second conductive via penetrating the fourth conductive plate, wherein the second conductive via is electrically coupled to the fourth conductive plate.


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