The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2025

Filed:

Jan. 16, 2024
Applicant:

Synopsys, Inc., Sunnyvale, CA (US);

Inventors:

Andrew Edward Horch, Seattle, WA (US);

Larry Y. Wang, San Jose, CA (US);

Wenkai Hung, Zhubei, TW;

Assignee:

SYNOPSYS, INC., Sunnyvale, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 17/16 (2006.01); G11C 17/18 (2006.01); H10B 20/25 (2023.01);
U.S. Cl.
CPC ...
H10B 20/25 (2023.02); G11C 17/16 (2013.01); G11C 17/18 (2013.01);
Abstract

A current may be passed through a channel of an anti-fuse field-effect transistor (FET) to increase a temperature of a gate dielectric of the anti-fuse FET and change a rupture voltage of the gate dielectric of the anti-fuse FET from a first rupture voltage to a second rupture voltage. The gate dielectric may be ruptured by applying a first voltage between the gate dielectric and the channel of the anti-fuse FET, where the first voltage is between the first rupture voltage and the second rupture voltage.


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