The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 14, 2025
Filed:
Feb. 06, 2024
Southeast University, Nanjing, CN;
Di Bao, Nanjing, CN;
Tiejun Cui, Nanjing, CN;
Kai Lu, Nanjing, CN;
Chenchen Li, Nanjing, CN;
Jiemin Wu, Nanjing, CN;
SOUTHEAST UNIVERSITY, Nanjing, CN;
Abstract
An on-chip dual-mode transmission line with an spoof surface plasmon based on a balun includes a dual-mode transmission line located in the intermediate, the balun structures symmetrically located at both terminals of the dual-mode transmission line, and pad structures and excitation portions located outside the balun structures. The dual-mode transmission line comprises two metal strip lines that are the same in structure and parallel to each other, and the branches located between the two metal strip lines. The dual-mode transmission line can simultaneously support the transmissions of the odd-mode spoof surface plasmon signal and the even-mode spoof surface plasmon signal, and is not only suitable for III-V chips such as gallium arsenide and silicon nitride, but also suitable for technologies such as other chips and printed circuit boards.