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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12444695 B1

PDFFull Text
Date of Patent:
Oct. 14, 2025

Filed:

Mar. 14, 2022

Memory device including support structures and contact structures having different materials

Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Shuangqiang Luo, Boise, ID (US);

John Hopkins, Meridian, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:

Schwegman Lundberg & Woessner, P.A.

Primary Examiner:

Sheikh Maruf

Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 23/00 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H10B 41/10 (2023.01); H10B 41/35 (2023.01); H10B 41/41 (2023.01); H10B 43/10 (2023.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01); H10D 30/68 (2025.01); H10D 30/69 (2025.01); H10D 64/01 (2025.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 23/53257 (2013.01); H10B 41/10 (2023.02); H10B 41/35 (2023.02); H10B 41/41 (2023.02); H10B 43/10 (2023.02); H10B 43/35 (2023.02); H10B 43/40 (2023.02); H10D 30/6892 (2025.01); H10D 30/696 (2025.01); H10D 64/035 (2025.01); H10D 64/037 (2025.01);
Abstract

Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes tiers located one over another, the tiers including respective memory cells and control gates for the memory cells; a first pillar extending through the tiers and separated from the control gates, the first pillar including a first dielectric liner portion and a first core portion adjacent the first dielectric liner portion, the first dielectric liner portion and the first core portion extending along a length of the first pillar; and a second pillar extending through the tiers and separated from the control gates, the second pillar including a second dielectric liner portion and a second core portion adjacent the second dielectric liner portion, the second dielectric portion and the second core portion extending along a length of the second pillar, wherein the first core portion and the second core portion have different materials.

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