The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 14, 2025

Filed:

Sep. 30, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Jeremy Ecton, Gilbert, AZ (US);

Aleksandar Aleksov, Chandler, AZ (US);

Hiroki Tanaka, Gilbert, AZ (US);

Brandon Marin, Gilbert, AZ (US);

Srinivas Pietambaram, Chandler, AZ (US);

Xavier Brun, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 23/13 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49833 (2013.01); H01L 21/4803 (2013.01); H01L 21/481 (2013.01); H01L 21/4846 (2013.01); H01L 23/13 (2013.01); H01L 23/49894 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/08 (2013.01); H01L 24/80 (2013.01); H01L 24/16 (2013.01); H01L 2224/0346 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/08225 (2013.01); H01L 2224/16146 (2013.01); H01L 2224/1624 (2013.01); H01L 2224/80201 (2013.01); H01L 2224/80379 (2013.01); H01L 2924/0665 (2013.01);
Abstract

Microelectronic integrated circuit package structures include a first substrate coupled to a second substrate by a conductive interconnect structure and a dielectric material adjacent to the conductive interconnect structure. A cavity in a surface of the first substrate is adjacent to the conductive interconnect structure. A portion of the dielectric material is within the cavity.


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