The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 2025

Filed:

Jun. 10, 2024
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Wei-Chieh Huang, Hsinchu County, TW;

Jieh-Jang Chen, Hsinchu County, TW;

Feng-Jia Shiu, Hsinchu County, TW;

Chern-Yow Hsu, Hsin-Chu County, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10N 70/00 (2023.01); H01L 21/285 (2006.01); H01L 21/3105 (2006.01); H01L 21/311 (2006.01); H01L 21/321 (2006.01); H01L 21/768 (2006.01); H10B 63/00 (2023.01); H10N 70/20 (2023.01);
U.S. Cl.
CPC ...
H10N 70/8418 (2023.02); H01L 21/28562 (2013.01); H01L 21/28568 (2013.01); H01L 21/31053 (2013.01); H01L 21/31144 (2013.01); H01L 21/3212 (2013.01); H01L 21/76879 (2013.01); H10B 63/80 (2023.02); H10N 70/021 (2023.02); H10N 70/063 (2023.02); H10N 70/231 (2023.02); H10N 70/826 (2023.02); H10N 70/8413 (2023.02); H10N 70/8828 (2023.02); H10N 70/8833 (2023.02);
Abstract

A method includes providing a substrate having a conductive column, a dielectric layer over the conductive column, and a plurality of sacrificial blocks over the dielectric layer, the plurality of sacrificial blocks surrounding the conductive column from a top view; depositing a sacrificial layer covering the plurality of sacrificial blocks, the sacrificial layer having a dip directly above the conductive column; depositing a hard mask layer over the sacrificial layer; removing a portion of the hard mask layer from a bottom of the dip; etching the bottom of the dip using the hard mask layer as an etching mask, thereby exposing a top surface of the conductive column; and forming a conductive material inside the dip, the conductive material being in physical contact with the top surface of the conductive column.


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