The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 2025

Filed:

Jan. 13, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Hsin Fu Lin, Hsinchu County, TW;

Tsung-Hao Yeh, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 62/17 (2025.01); H10D 30/01 (2025.01); H10D 30/65 (2025.01); H10D 62/10 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H01L 21/22 (2006.01); H01L 21/265 (2006.01); H01L 21/266 (2006.01);
U.S. Cl.
CPC ...
H10D 62/299 (2025.01); H10D 30/027 (2025.01); H10D 30/65 (2025.01); H10D 62/126 (2025.01); H10D 62/307 (2025.01); H10D 84/0156 (2025.01); H10D 84/038 (2025.01); H01L 21/22 (2013.01); H01L 21/26513 (2013.01); H01L 21/266 (2013.01);
Abstract

The present disclosure relates to a semiconductor structure that includes a well region and a semiconductor substrate. The well region is disposed within the semiconductor substrate. The well region includes a plurality of first regions separated by a plurality of second regions, where the plurality of first regions is of a first doping and the plurality of second regions are of a second doping different than the first doping. A gate electrode overlies the well region where the gate electrode is disposed laterally over a portion of the plurality of first regions and a portion of the plurality of second regions.


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