The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 2025

Filed:

Jun. 13, 2023
Applicant:

Synopsys, Inc., Sunnyvale, CA (US);

Inventors:

Sri Ram Kumar Jayanthi, Andhra Pradesh, IN;

Akhil Thotli, Andhra Pradesh, IN;

Rahul Gupta, Haryana, IN;

Assignee:

SYNOPSYS, INC., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0944 (2006.01);
U.S. Cl.
CPC ...
H03K 19/0944 (2013.01);
Abstract

A logic circuit includes: a first cascode circuit including: a first transistor, a second transistor, and a third transistor connected in series, the third transistor connected to an output of the first cascode circuit; and a first diode connected in parallel with the third transistor; and a second cascode circuit connected in series with the first cascode circuit, the second cascode circuit including: a fourth transistor, a fifth transistor, and a sixth transistor connected in series, the sixth transistor connected to an output of the second cascode circuit; and a second diode connected in parallel with the sixth transistor; and wherein the output of the first cascode circuit is connected to the output of the second cascode circuit and connects the first cascode circuit in series with the second cascode circuit.


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