The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2025

Filed:

Aug. 26, 2024
Applicant:

Globalfoundries Singapore Pte. Ltd., Singapore, SG;

Inventors:

Ting Yang, Singapore, SG;

Jie Zeng, Singapore, SG;

Kyong Jin Hwang, Singapore, SG;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10D 62/815 (2025.01); H10D 89/60 (2025.01);
U.S. Cl.
CPC ...
H10D 89/713 (2025.01); H10D 62/815 (2025.01);
Abstract

Disclosed is a semiconductor structure including a device (e.g., a bi-directional semiconductor-controlled rectifier, such as a bi-directional silicon-controlled rectifier (BDSCR)) and, within the device, at least two dual-level isolation structures. Each dual-level isolation structure includes a first section at the top surface of the semiconductor substrate and one or more second sections extending through the first section deeper into the semiconductor substrate. The dual-level isolation structures are positioned within the device so as to increase well resistance. By increasing well resistance, the trigger voltage of the device can be reduced without increasing device size. Also disclosed is a method of forming dual-level isolation structures within such a device.


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