The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2025

Filed:

Feb. 16, 2023
Applicant:

Infineon Technologies Austria Ag, Villach, AT;

Inventors:

Christian Schippel, Dresden, DE;

Dirk Priefert, Moers, DE;

Felix Simon Winterer, Munich, DE;

Remigiusz Viktor Boguszewicz, Essen, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 62/10 (2025.01); H10D 84/60 (2025.01); H10D 89/60 (2025.01); H10D 8/25 (2025.01); H10D 10/40 (2025.01); H10D 64/00 (2025.01);
U.S. Cl.
CPC ...
H10D 62/102 (2025.01); H10D 84/617 (2025.01); H10D 89/611 (2025.01); H10D 8/25 (2025.01); H10D 10/421 (2025.01); H10D 64/112 (2025.01);
Abstract

A semiconductor device includes a substrate layer having a floating base region of a first conductivity type. A first well of a second conductivity type and the floating base region form a first pn junction. A first conductive structure is electrically connected to the first well. A barrier region of the second conductivity type and the floating base region form an auxiliary pn junction. A second conductive structure is electrically connected to the floating base region through a rectifying structure. A pull-down structure is configured to produce a voltage drop between the barrier region and the second conductive structure, when charge carriers cross the auxiliary pn junction.


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