The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2025

Filed:

Sep. 27, 2023
Applicant:

Hamilton Sundstrand Corporation, Charlotte, NC (US);

Inventors:

Rajesh Madathikandam, Karnataka, IN;

Robin David Hill, Solihull, GB;

Stephen Potter, Nuneaton, GB;

Ashish Vijay, Rajasthan, IN;

Rajeeva Krishna, Bangalore, IN;

Anitha Thangavel, Karnataka, IN;

Assignee:

HAMILTON SUNDSTRAND CORPORATION, Charlotte, NC (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/12 (2006.01); G06F 11/10 (2006.01); G06F 13/16 (2006.01);
U.S. Cl.
CPC ...
G06F 13/124 (2013.01); G06F 11/1004 (2013.01); G06F 13/1668 (2013.01);
Abstract

A microprocessor-PLD hybrid architecture includes an IPC microprocessor and a PLD in signal communication with the IPC microprocessor via an IPC interface. The IPC microprocessor outputs a data read command to initiate a data read operation or a data write command. The PLD includes a plurality of PLD modules that store data and a bus controller. The bus controller communicates with the plurality of PLD modules via a plurality of PLD interfaces and is configured to sequentially execute a set of bus controller instructions. The bus controller reads data from a target PLD module from among the plurality of PLD modules in response to receiving the data read command, and transfers the data to the IPC microprocessor. The bus controller receives data from the IPC microprocessor and stores the data in a target PLD module from among the plurality of PLD modules in response to receiving the data write command.


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