The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 30, 2025
Filed:
Nov. 30, 2023
Applicant:
Sifive, Inc., San Mateo, CA (US);
Inventors:
Wesley Waylon Terpstra, San Mateo, CA (US);
Richard Van, San Jose, CA (US);
Assignee:
SiFive, Inc., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0811 (2016.01); G06F 12/0815 (2016.01); G06F 12/0831 (2016.01); G06F 12/0846 (2016.01); G06F 12/121 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0811 (2013.01); G06F 12/0815 (2013.01); G06F 12/0833 (2013.01); G06F 12/0846 (2013.01); G06F 12/121 (2013.01);
Abstract
Systems and methods for data storage in a non-inclusive cache. An integrated circuit includes a cache that includes a databank with multiple entries configured to store respective cache lines and an array of cache tags. Each cache tag includes a data pointer that points to an entry in the databank. A method includes allocating the entry in the databank to the cache including the array of cache tags from amongst multiple caches in the integrated circuit by writing the data pointer to the cache tag in the array of cache tags.