The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2025

Filed:

May. 30, 2023
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Deping He, Boise, ID (US);

Ching-Huang Lu, Fremont, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); G06F 12/02 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0292 (2013.01); G11C 16/0483 (2013.01); G11C 16/10 (2013.01);
Abstract

A memory device includes a memory array comprising memory cells associated with a plurality of wordlines control logic that is to perform operations including: causing memory cells of a physical unit of the memory array to be programmed starting at a second wordline, which is adjacent to a first wordline of the memory array, and proceeding sequentially through a plurality of sequentially-ordered wordlines of the physical unit, wherein the first wordline is associated with memory cells that are adjacent to one or more select gate (SG) transistors of the memory array, and the sequentially-ordered wordlines are numbered according to a distance away from the one or more SG transistors; and at least one of after the memory cells associated with the second wordline are programmed or after completion of programming the physical unit, causing the memory cells associated with the first wordline to be programmed.


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