The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 30, 2025
Filed:
May. 11, 2023
Intel Corporation, Santa Clara, CA (US);
Kevin Nealis, San Jose, CA (US);
Anbang Yao, Beijing, CN;
Xiaoming Chen, Shanghai, CN;
Elmoustapha Ould-Ahmed-Vall, Chandler, AZ (US);
Sara S. Baghsorkhi, San Jose, CA (US);
Eriko Nurvitadhi, Hillsboro, OR (US);
Balaji Vembu, Folsom, CA (US);
Nicolas C. Galoppo Von Borries, Portland, OR (US);
Rajkishore Barik, Santa Clara, CA (US);
Tsung-Han Lin, Campbell, CA (US);
Kamal Sinha, Cordova, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
One embodiment provides for a compute apparatus comprising a decode unit to decode a single instruction into a decoded instruction that specifies multiple operands including a multi-bit input value and a one-bit weight associated with a neural network, as well as an arithmetic logic unit including a multiplier, an adder, and an accumulator register. To execute the decoded instruction, the multiplier is to perform a fused operation including an exclusive not OR (XNOR) operation and a population count operation. The adder is configured to add the intermediate product to a value stored in the accumulator register and update the value stored in the accumulator register.