The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 30, 2025
Filed:
Dec. 22, 2021
Intel Corporation, Santa Clara, CA (US);
Atul Maheshwari, Portland, OR (US);
Ankireddy Nalamalpu, Portland, OR (US);
Mahesh A. Iyer, Fremont, CA (US);
Mahesh K. Kumashikar, Bangalore, IN;
Altera Corporation, San Jose, CA (US);
Abstract
Systems or methods of the present disclosure may provide for gradually adjusting a frequency of a clock signal. When transitioning from a configuration mode to a user mode, a clock of an integrated circuit (e.g., a field-programmable gate array or FPGA) may quickly (e.g., instantaneously) switch from a low configuration mode frequency to a high user mode frequency. This rapid increase in clock frequency may cause an inrush current and corresponding current-resistance voltage (IR) drop. To reduce or avoid the inrush current and IR drop, a frequency of the clock may be gradually ramped up from the configuration mode frequency to the user mode frequency.