The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2025

Filed:

Aug. 30, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Harry-Hak-Lay Chuang, Hsinchu County, TW;

Wen-Chun You, Yilan County, TW;

Hung-Cho Wang, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 20/25 (2023.01); H10N 50/01 (2023.01); H10N 50/80 (2023.01);
U.S. Cl.
CPC ...
H10B 20/25 (2023.02); H10N 50/01 (2023.02); H10N 50/80 (2023.02);
Abstract

A memory device includes an one-time-programmable (OTP) memory unit. The OTP memory unit includes a first gate, a first conductive segment and a second conductive segment of a first structure, and a first magnetic tunnel junction (MTJ) component. The first gate is formed across an active region, and corresponds to gate terminals of a first transistor and a second transistor. The first conductive segment and the second conductive segment of the first structure are formed above the active region, and correspond to a first source/drain terminal of the first transistor and a first source/drain terminal of the second transistor, respectively. The first MTJ component is formed in a first conductive layer above the active region, and is coupled to the first conductive segment and the second conductive segment for receiving a programming signal from a data line. A method for fabricating a memory device is also disclosed herein.


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