The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2025

Filed:

May. 15, 2023
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Qing Jiang, Mississauga, CA;

Adam Ross Burns, Burlington, CA;

Karanbir Singh Chahal, Brampton, CA;

Yunus Ibrahim Dawji, North York, CA;

Assignee:

Synopsys, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 9/00 (2006.01); H03K 17/687 (2006.01); H03K 17/76 (2006.01); H03K 19/0185 (2006.01);
U.S. Cl.
CPC ...
H03M 9/00 (2013.01); H03K 17/6872 (2013.01); H03K 17/76 (2013.01); H03K 19/018514 (2013.01);
Abstract

A level-shiftless transmitter includes a transmitter driver circuit. The transmitter driver circuit includes a first PMOS device, a second PMOS device, a first NMOS device, a second NMOS device, and a sub-circuit. The sources of the first and second PMOS devices are electrically coupled with each other. The gates of the first PMOS and the first NMOS devices are electrically coupled with each other. The gates of the second PMOS and the second NMOS devices are electrically coupled with each other. The sub-circuit is electrically coupled with a voltage domain to provide a voltage lower than the voltage domain to the sources of the first and second PMOS devices.


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