The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2025

Filed:

Dec. 23, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Michael Fulde, Weil, DE;

Harneet Khurana, Cupertino, CA (US);

Matteo Camponeschi, Villach, AT;

Patrizia Greco, Villach, AT;

Christian Lindholm, Villach, AT;

Martin Clara, Santa Clara, CA (US);

Giacomo Cascio, Villach, AT;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/12 (2006.01); H03M 1/00 (2006.01); H03M 1/06 (2006.01);
U.S. Cl.
CPC ...
H03M 1/0682 (2013.01); H03M 1/002 (2013.01);
Abstract

A successive approximation register (SAR) analog-to-digital converter (ADC) includes a plurality of differential capacitive digital-to-analog converters (C-DACs), comparators, and an SAR controller. Each differential C-DAC comprises a pair of C-DACs for positive and negative polarities and each C-DAC comprises a capacitor array. A capacitor for each bit position may include a pair of equal-sized capacitors. Each outer comparator is coupled to one of the differential C-DACs and the middle comparator is coupled to a differential output node pair of C-DACs from two differential C-DACs. The SAR controller generates a control signal for the differential C-DACs for each conversion step based on outputs of the comparators. The outputs of the comparators are provided to the differential C-DACs as the control signal without encoding. Single-bit/cycle shorting switches for shorting top plates of capacitors of the C-DACs of same polarity may be closed during a single-bit/cycle conversion.


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