The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 2025

Filed:

Apr. 19, 2024
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Szu-Ying Chen, Toufen Township, TW;

Dun-Nian Yaung, Taipei, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 25/00 (2006.01); H01L 23/00 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 23/58 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01); H10F 39/00 (2025.01); H10F 39/12 (2025.01); H10F 39/18 (2025.01);
U.S. Cl.
CPC ...
H01L 25/50 (2013.01); H01L 23/5226 (2013.01); H01L 23/528 (2013.01); H01L 23/585 (2013.01); H01L 24/09 (2013.01); H01L 24/81 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H10F 39/18 (2025.01); H10F 39/199 (2025.01); H10F 39/809 (2025.01); H10F 39/811 (2025.01); H01L 24/05 (2013.01); H01L 24/06 (2013.01); H01L 24/48 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/05025 (2013.01); H01L 2224/05568 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/056 (2013.01); H01L 2224/06515 (2013.01); H01L 2224/08052 (2013.01); H01L 2224/08146 (2013.01); H01L 2224/0913 (2013.01); H01L 2224/09515 (2013.01); H01L 2224/09517 (2013.01); H01L 2224/48463 (2013.01); H01L 2224/8122 (2013.01); H01L 2224/81359 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/12043 (2013.01); H01L 2924/14 (2013.01); H01L 2924/1433 (2013.01); H01L 2924/1434 (2013.01); H01L 2924/1436 (2013.01); H01L 2924/1437 (2013.01);
Abstract

A chip includes a semiconductor substrate, integrated circuits with at least portions in the semiconductor substrate, and a surface dielectric layer over the integrated circuits. A plurality of metal pads is distributed substantially uniformly throughout substantially an entirety of a surface of the chip. The plurality of metal pads has top surfaces level with a top surface of the surface dielectric layer. The plurality of metal pads includes active metal pads and dummy metal pads. The active metal pads are electrically coupled to the integrated circuits. The dummy metal pads are electrically decoupled from the integrated circuits.


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