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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12424519 B1

PDFFull Text
Date of Patent:
Sep. 23, 2025

Filed:

Jun. 28, 2022

Semiconductor structure, method for manufacturing semiconductor structure, and memory

Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventor:

Shuangshuang Wu, Hefei, CN;

Assignee:

CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei, CN;

Attorneys:

SYNCODA LLC

Feng Ma

Primary Examiner:

Julia Slutsker

Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 21/768 (2006.01); H01L 23/535 (2006.01);
U.S. Cl.
CPC ...
H01L 23/481 (2013.01); H01L 21/76805 (2013.01); H01L 21/76829 (2013.01); H01L 21/7684 (2013.01); H01L 21/76843 (2013.01); H01L 21/76895 (2013.01); H01L 21/76898 (2013.01); H01L 23/535 (2013.01);
Abstract

A semiconductor structure includes: a base, including a substrate, a first isolation layer, a first dielectric layer, and a stop layer that are formed in a stack manner, a first contact hole being formed in the base; a first insulating layer and a first barrier layer sequentially formed on an inner wall of the first contact hole, a first contact structure being disposed in the first contact hole; a protective layer covering an upper surface of the first contact structure; a second dielectric layer and a second isolation layer sequentially stacked on the protective layer, a second contact hole being formed in the base; and a second barrier layer formed on an inner wall of the second contact hole and a second contact structure disposed in the second contact hole.

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Wu, Shuangshuang. (2025). Semiconductor structure, method for manufacturing semiconductor structure, and memory (U.S. Patent No. 12424519). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12424519

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