The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 23, 2025
Filed:
Feb. 14, 2023
Changxin Memory Technologies, Inc., Hefei, CN;
Ling-Yi Chuang, Hefei, CN;
CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei, CN;
Abstract
A wafer warpage adjustment structure is provided. The wafer warpage adjustment structure includes a wafer, a first dielectric layer, and a second dielectric layer. Each of the first and second dielectric layers includes at least a first area or a second area, and other areas other than at least the first area or the second area. The first area covers a portion of the wafer protruded in a direction perpendicular to a surface of the wafer and extending from the wafer to the dielectric layer, and the second area covers a portion of the wafer recessed in the direction. CTE of a material of the first area is greater than CTE of a material of the wafer, and CTE of a material of the second area is less than CTE of the material of the wafer. A method for manufacturing the same is also provided.