The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 16, 2025

Filed:

Jun. 04, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Yin Wang, New Taipei, TW;

Chunyao Wang, Hsinchu County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/66 (2025.01); H01L 21/28 (2006.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 62/13 (2025.01);
U.S. Cl.
CPC ...
H10D 64/671 (2025.01); H01L 21/28123 (2013.01); H10D 30/024 (2025.01); H10D 30/6211 (2025.01); H10D 62/151 (2025.01);
Abstract

A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a gate stack formed over the substrate. The semiconductor device structure includes a spacer structure formed over a sidewall of the gate stack. The spacer structure includes a dielectric layer, a silicon rich layer, and a protection layer. The dielectric layer is formed between the gate stack and the silicon rich layer. The silicon rich layer is formed between the dielectric layer and the protection layer. A first atomic percentage of silicon in the silicon rich layer is greater than about 50%. The semiconductor device structure includes a source/drain structure formed over the substrate. The spacer structure is formed between the source/drain structure and the gate stack.


Find Patent Forward Citations

Loading…