The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 16, 2025
Filed:
Oct. 01, 2022
Intel Corporation, Santa Clara, CA (US);
Menachem Adelman, Modi'in, IL;
Amit Gradstein, Binyamina, IL;
Alexander Heinecke, San Jose, CA (US);
Christopher Hughes, Santa Clara, CA (US);
Naveen Mellempudi, Bangalore, IN;
Shahar Mizrahi, Haifa, IL;
Dana Rip, Haifa, IL;
Simon Rubanovich, Haifa, IL;
Uri Sherman, Bustan Hagalil, IL;
Guy Boudoukh, Ramat Hasharon, IL;
Evangelos Georganas, San Jose, CA (US);
Nilesh Jain, Portland, OR (US);
Barukh Ziv, Haifa, IL;
Intel Corporation, Santa Clara, CA (US);
Abstract
Systems, methods, and apparatuses relating sparsity based FMA. In some examples, an instance of a single FMA instruction has one or more fields for an opcode, one or more fields to identify a source/destination matrix operand, one or more fields to identify a first plurality of source matrix operands, one or more fields to identify a second plurality of matrix operands, wherein the opcode is to indicate that execution circuitry is to select a proper subset of FP8 data elements from the first plurality of source matrix operands based on sparsity controls from a first matrix operand of the second plurality of matrix operands and perform a FMA.