The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 16, 2025
Filed:
Aug. 25, 2022
Cadence Design Systems, Inc., San Jose, CA (US);
Steven L. Gregor, Owego, NY (US);
Puneet Arora, Uttar Pradesh, IN;
Ke Zhang, Austin, TX (US);
Mohit Madaan, Gurugram, IN;
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
A memory view generator evaluates a module design file characterizing a memory module to generate a set of port functions that defines operations of ports on a memory module for a memory view file. The memory view generator parses a memory module bitmap characterizing a physical layout of the memory module to determine a physical memory model of address bits, an order of rows, an order of columns, an order of banks and data bits of the memory module for the physical memory view file. A circuit simulator instantiates a memory module and provide simulation results based on a simulation memory model of the memory module, the set of port functions and the physical memory model. The memory view generator analyzes the simulation results to determine operational performance characteristics of the memory module for the memory view file.