The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 09, 2025
Filed:
Aug. 31, 2020
Korea Electrotechnology Research Institute, Changwon-si, KR;
Jeong Hyun Moon, Gimhae-si, KR;
In-Ho Kang, Jinju-si, KR;
Sang Cheol Kim, Changwon-si, KR;
Hyoung Woo Kim, Changwon-si, KR;
Moonkyong Na, Changwon-si, KR;
Wook Bahng, Changwon-si, KR;
Ogyun Seok, Busan, KR;
KOREA ELECTROTECHNOLOGY RESEARCH INSTITUTE, Changwon-si, KR;
Abstract
The present invention relates to a trench-gate SiC MOSFET device and a manufacturing method therefor. The trench-gate SiC MOSFET device of the present invention comprises: a gate oxide film covering a gate trench formed in a SiC substrate (e.g., an n-type 4H-SiC substrate); a doped well (e.g., BPW) formed in a bottom region of the gate trench; a gate electrode formed in the gate trench covered by the gate oxide film; an interlayer insulating film formed on the gate electrode; a source electrode covering the top surface of a doping layer for a source area formed on the entire surface of an epitaxial layer of the substrate and the top surface of the interlayer insulating film; and a drain electrode formed on the rear surface of the substrate.