The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 2025

Filed:

Jun. 01, 2022
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Kwnag-Soo Kim, Sunnyvale, CA (US);

Vivek Kishorechand Arora, San Jose, CA (US);

Woochan Kim, San Jose, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 21/48 (2006.01); H01L 23/373 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 25/16 (2023.01); H01L 25/18 (2023.01);
U.S. Cl.
CPC ...
H01L 23/5383 (2013.01); H01L 21/481 (2013.01); H01L 21/4857 (2013.01); H01L 23/3735 (2013.01); H01L 23/3121 (2013.01); H01L 23/49894 (2013.01); H01L 24/48 (2013.01); H01L 25/16 (2013.01); H01L 25/18 (2013.01); H01L 2224/48225 (2013.01);
Abstract

An example semiconductor package comprises a multi-layer substrate having a bottom metal layer, a top metal layer, and a first insulation layer between bottom metal layer and the top metal layer. A plurality of first conductive traces are formed in the top metal layer. A second insulation layer is disposed over the exposed portions of the first insulation layer and over segments of the first conductive traces. A plurality of second conductive traces formed on top of the second insulation layer. One or more semiconductor dies are mounted on the one or more second segments of the conductive traces. One or more bond wires couple the semiconductor dies to one or more of the second conductive traces. A mold compound covers at least a portion of the semiconductor dies, the second insulation layer, the first conductive traces, and the second conductive traces.


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