The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 09, 2025
Filed:
Dec. 28, 2022
Texas Instruments Incorporated, Dallas, TX (US);
Masamitsu Matsuura, Beppu, JP;
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Abstract
In some examples, a semiconductor package comprises a first die pad having a first top surface and a first bottom surface opposing the first top surface and a second die pad in horizontal alignment with the first die pad, the second die pad having a second top surface and a second bottom surface opposing the second top surface, a gap separating the first and second die pads. The package comprises a semiconductor die electrically coupled to the first and second bottom surfaces and extending across the gap, the semiconductor die having a device side including circuitry formed therein, the device side facing away from the first and second die pads. The package comprises a first conductive terminal extending from a lateral surface of the first die pad and away from the first die pad, the first conductive terminal having multiple down-sets. The package comprises a second conductive terminal extending from a lateral surface of the second die pad and away from the second die pad, the second conductive terminal having multiple down-sets. The package comprises a third conductive terminal having fewer down-sets than the first and second conductive terminals and extending from below the first die pad and away from the first die pad. The package comprises a bond wire coupling the device side of the semiconductor die to the third conductive terminal. The package comprises a mold compound covering the semiconductor die and the bond wire, the first and second die pads exposed to an exterior of the mold compound through a top surface of the mold compound. The package comprises a passive electrical component external to the mold compound and having a first electrical contact coupled to the first die pad and having a second electrical contact coupled to the second die pad. The first, second, and third conductive terminals include distal ends that are exposed through a common side surface of the mold compound, the distal ends in horizontal alignment with each other.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile