The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 2025

Filed:

Jul. 01, 2022
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventor:

Shuangshuang Wu, Hefei, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/08 (2020.01); G01R 31/26 (2020.01); H01L 21/66 (2006.01); H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
H01L 22/32 (2013.01); G01R 31/2601 (2013.01); H01L 23/481 (2013.01);
Abstract

A semiconductor structure includes: a through silicon via penetrating a base; and a protection structure, including: a conductive first test ring and a conductive second test ring both arranged around the through silicon via and electrically insulated from the through silicon via; a first dielectric layer located between the first test ring and the second test ring and configured to electrically isolate the first test ring from the second test ring; and a first connection layer located in the first dielectric layer and configured to be electrically connected to the first test ring and the second test ring.


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Wu, Shuangshuang. (2025). Semiconductor structure, memory, and crack testing method (U.S. Patent No. 12412790). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12412790

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