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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12412628 B1

PDFFull Text
Date of Patent:
Sep. 09, 2025

Filed:

May. 20, 2024

Methods for forming three-dimensional memory devices

Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, CN;

Inventors:

Yuancheng Yang, Wuhan, CN;

Wenxi Zhou, Wuhan, CN;

Zhiliang Xia, Wuhan, CN;

Wei Liu, Wuhan, CN;

Assignee:

YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan, CN;

Attorney:

BAYES PLLC

Primary Examiner:

Phuc T Dang

Int. Cl.
CPC ...
H10B 41/27 (2023.01); G11C 16/04 (2006.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01); H01L 23/528 (2006.01); H10B 41/35 (2023.01); H10B 41/40 (2023.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01);
U.S. Cl.
CPC ...
G11C 16/0483 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); H01L 23/5283 (2013.01); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 41/40 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02); H10B 43/40 (2023.02);
Abstract

A method for forming a three-dimensional (3D) memory device is disclosed. An array of NAND memory strings is formed on a first substrate. A first semiconductor layer is formed above the array of NAND memory strings. The first semiconductor layer includes single crystalline silicon. A first transistor is formed on the first semiconductor layer. A second semiconductor layer is formed above the first transistor. The second semiconductor layer includes single crystalline silicon. A second transistor is formed on the second semiconductor layer.

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Yang, Yuancheng. (2025). Methods for forming three-dimensional memory devices (U.S. Patent No. 12412628). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12412628

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